EN lcd_timing NULL E:/ProjFPGA/ct-BASIC-LCD/source/lcd_timing.vhd sub00/vhpl15 1257248679
EN sr16cle_mxilinx_spi_sro32 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sro32.vhf sub00/vhpl51 1257248715
EN d3_8e_mxilinx_spi_lrc NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_LRC.vhf sub00/vhpl73 1257248737
AR bbfifo_16x8 low_level_definition E:/ProjFPGA/ct-BASIC-LCD/source/bbfifo_16x8.vhd sub00/vhpl08 1257248672
AR sr4ce_mxilinx_spi_sri8 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri8.vhf sub00/vhpl34 1257248698
AR fd8ce_mxilinx_spi_lrc behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_LRC.vhf sub00/vhpl70 1257248734
EN graph_mem_lcd NULL E:/ProjFPGA/ct-BASIC-LCD/main/graph_mem_lcd.vhd sub00/vhpl19 1257248683
EN fd16ce_mxilinx_spi_sri32 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri32.vhf sub00/vhpl45 1257248709
AR spi_sri32 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri32.vhf sub00/vhpl48 1257248712
AR ftce_mxilinx_gtext_lcd320 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/GTEXT_LCD320.vhf sub00/vhpl82 1257248746
AR spi_inmux4 behavioral E:/ProjFPGA/ct-BASIC-LCD/source/SPI_inmux4.vhd sub00/vhpl60 1257248724
AR uart_tx macro_level_definition E:/ProjFPGA/ct-BASIC-LCD/source/uart_tx.vhd sub00/vhpl32 1257248696
EN ps2kbd NULL E:/ProjFPGA/ct-BASIC-LCD/source/ps2kbd.vhd sub00/vhpl63 1257248727
EN fd16ce_mxilinx_spi_reg32 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_reg32.vhf sub00/vhpl55 1257248719
EN fd8ce_mxilinx_spi_lrc NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_LRC.vhf sub00/vhpl69 1257248733
EN t65_mcode NULL E:/ProjFPGA/ct-BASIC-LCD/source/T65_MCode.vhd sub00/vhpl01 1257248665
AR kcuart_tx low_level_definition E:/ProjFPGA/ct-BASIC-LCD/source/kcuart_tx.vhd sub00/vhpl06 1257248670
AR com_mux behavioral E:/ProjFPGA/ct-BASIC-LCD/source/COM_mux.vhd sub00/vhpl88 1257248752
AR gtext_lcd320 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/GTEXT_LCD320.vhf sub00/vhpl86 1257248750
EN count_lrc NULL E:/ProjFPGA/ct-BASIC-LCD/source/COUNT_LRC.vhd sub00/vhpl61 1257248725
EN sr4ce_mxilinx_spi_sri8 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri8.vhf sub00/vhpl33 1257248697
AR lcd_timing behavioral E:/ProjFPGA/ct-BASIC-LCD/source/lcd_timing.vhd sub00/vhpl16 1257248680
AR comp4_mxilinx_spi_lrc behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_LRC.vhf sub00/vhpl72 1257248736
AR t65_alu rtl E:/ProjFPGA/ct-BASIC-LCD/source/T65_ALU.vhd sub00/vhpl04 1257248668
EN sr8ce_mxilinx_spi_sri8 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri8.vhf sub00/vhpl37 1257248701
AR framer_lcd behave E:/ProjFPGA/ct-BASIC-LCD/source/framer_lcd.vhd sub00/vhpl24 1257248688
EN sr16ce_mxilinx_spi_sri32 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri32.vhf sub00/vhpl43 1257248707
AR cb2ce_mxilinx_gtext_lcd320 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/GTEXT_LCD320.vhf sub00/vhpl84 1257248748
EN m2_1_mxilinx_spi_sro32 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sro32.vhf sub00/vhpl49 1257248713
AR uart_rx macro_level_definition E:/ProjFPGA/ct-BASIC-LCD/source/uart_rx.vhd sub00/vhpl30 1257248694
AR main behavioral E:/ProjFPGA/ct-BASIC-LCD/main/main.vhf sub00/vhpl92 1257248756
EN basic_glue NULL E:/ProjFPGA/ct-BASIC-LCD/source/BASIC_glue.vhd sub00/vhpl77 1257248741
EN main NULL E:/ProjFPGA/ct-BASIC-LCD/main/main.vhf sub00/vhpl91 1257248755
AR fd8ce_mxilinx_spi_sri8 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri8.vhf sub00/vhpl36 1257248700
EN t65_wrap NULL E:/ProjFPGA/ct-BASIC-LCD/source/T65_wrap.vhd sub00/vhpl89 1257248753
EN com_mux NULL E:/ProjFPGA/ct-BASIC-LCD/source/COM_mux.vhd sub00/vhpl87 1257248751
AR spi_sro32 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sro32.vhf sub00/vhpl54 1257248718
AR t65 rtl E:/ProjFPGA/ct-BASIC-LCD/source/T65.vhd sub00/vhpl12 1257248676
EN mem_text_lcd NULL E:/ProjFPGA/ct-BASIC-LCD/main/mem_text_lcd.vhd sub00/vhpl17 1257248681
EN kcuart_rx NULL E:/ProjFPGA/ct-BASIC-LCD/source/kcuart_rx.vhd sub00/vhpl09 1257248673
EN parser NULL E:/ProjFPGA/ct-BASIC-LCD/source/parser.vhd sub00/vhpl25 1257248689
EN spi_sri8 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri8.vhf sub00/vhpl39 1257248703
AR sr16ce_mxilinx_spi_sri32 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri32.vhf sub00/vhpl44 1257248708
EN sr4ce_mxilinx_spi_sri32 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri32.vhf sub00/vhpl41 1257248705
EN kcuart_tx NULL E:/ProjFPGA/ct-BASIC-LCD/source/kcuart_tx.vhd sub00/vhpl05 1257248669
AR mem_text_lcd mem_text_lcd_a E:/ProjFPGA/ct-BASIC-LCD/main/mem_text_lcd.vhd sub00/vhpl18 1257248682
AR sr8ce_mxilinx_spi_sri8 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri8.vhf sub00/vhpl38 1257248702
EN mem_font NULL E:/ProjFPGA/ct-BASIC-LCD/main/mem_font.vhd sub00/vhpl13 1257248677
EN d2_4e_mxilinx_spi_lrc NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_LRC.vhf sub00/vhpl67 1257248731
AR ps2kbd rtl E:/ProjFPGA/ct-BASIC-LCD/source/ps2kbd.vhd sub00/vhpl64 1257248728
EN t65_alu NULL E:/ProjFPGA/ct-BASIC-LCD/source/T65_ALU.vhd sub00/vhpl03 1257248667
EN cb2ce_mxilinx_gtext_lcd320 NULL E:/ProjFPGA/ct-BASIC-LCD/main/GTEXT_LCD320.vhf sub00/vhpl83 1257248747
EN spi_sro32 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sro32.vhf sub00/vhpl53 1257248717
AR spi_reg32 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_reg32.vhf sub00/vhpl58 1257248722
EN kcbaud NULL E:/ProjFPGA/ct-BASIC-LCD/source/kcbaud.vhd sub00/vhpl27 1257248691
EN t65 NULL E:/ProjFPGA/ct-BASIC-LCD/source/T65.vhd sub00/vhpl11 1257248675
EN fd8ce_mxilinx_spi_sri8 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri8.vhf sub00/vhpl35 1257248699
EN spi_lrc NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_LRC.vhf sub00/vhpl75 1257248739
EN bbfifo_16x8 NULL E:/ProjFPGA/ct-BASIC-LCD/source/bbfifo_16x8.vhd sub00/vhpl07 1257248671
AR mem_font mem_font_a E:/ProjFPGA/ct-BASIC-LCD/main/mem_font.vhd sub00/vhpl14 1257248678
AR t65_wrap rtl E:/ProjFPGA/ct-BASIC-LCD/source/T65_wrap.vhd sub00/vhpl90 1257248754
PH t65_pack NULL E:/ProjFPGA/ct-BASIC-LCD/source/T65_Pack.vhd sub00/vhpl00 1257248664
AR kcbaud behavioral E:/ProjFPGA/ct-BASIC-LCD/source/kcbaud.vhd sub00/vhpl28 1257248692
AR uart behavioral E:/ProjFPGA/ct-BASIC-LCD/main/UART.vhf sub00/vhpl80 1257248744
AR fd16ce_mxilinx_spi_sri32 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri32.vhf sub00/vhpl46 1257248710
EN irq_latch NULL E:/ProjFPGA/ct-BASIC-LCD/main/IRQ_latch.vhf sub00/vhpl65 1257248729
AR fd16ce_mxilinx_spi_reg32 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_reg32.vhf sub00/vhpl56 1257248720
AR sr16cle_mxilinx_spi_sro32 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sro32.vhf sub00/vhpl52 1257248716
AR basic_glue behave E:/ProjFPGA/ct-BASIC-LCD/source/BASIC_glue.vhd sub00/vhpl78 1257248742
EN ftce_mxilinx_gtext_lcd320 NULL E:/ProjFPGA/ct-BASIC-LCD/main/GTEXT_LCD320.vhf sub00/vhpl81 1257248745
AR d3_8e_mxilinx_spi_lrc behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_LRC.vhf sub00/vhpl74 1257248738
EN comp4_mxilinx_spi_lrc NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_LRC.vhf sub00/vhpl71 1257248735
EN spi_inmux4 NULL E:/ProjFPGA/ct-BASIC-LCD/source/SPI_inmux4.vhd sub00/vhpl59 1257248723
EN gtext_lcd320 NULL E:/ProjFPGA/ct-BASIC-LCD/main/GTEXT_LCD320.vhf sub00/vhpl85 1257248749
AR spi_lrc behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_LRC.vhf sub00/vhpl76 1257248740
EN framer_lcd NULL E:/ProjFPGA/ct-BASIC-LCD/source/framer_lcd.vhd sub00/vhpl23 1257248687
AR spi_sri8 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri8.vhf sub00/vhpl40 1257248704
AR graph_mem_lcd graph_mem_lcd_a E:/ProjFPGA/ct-BASIC-LCD/main/graph_mem_lcd.vhd sub00/vhpl20 1257248684
EN uart NULL E:/ProjFPGA/ct-BASIC-LCD/main/UART.vhf sub00/vhpl79 1257248743
EN spi_sri32 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri32.vhf sub00/vhpl47 1257248711
AR mid_point behavioral E:/ProjFPGA/ct-BASIC-LCD/source/bresenham.vhd sub00/vhpl22 1257248686
EN uart_rx NULL E:/ProjFPGA/ct-BASIC-LCD/source/uart_rx.vhd sub00/vhpl29 1257248693
AR t65_mcode rtl E:/ProjFPGA/ct-BASIC-LCD/source/T65_MCode.vhd sub00/vhpl02 1257248666
AR d2_4e_mxilinx_spi_lrc behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_LRC.vhf sub00/vhpl68 1257248732
AR parser behavioral E:/ProjFPGA/ct-BASIC-LCD/source/parser.vhd sub00/vhpl26 1257248690
AR kcuart_rx low_level_definition E:/ProjFPGA/ct-BASIC-LCD/source/kcuart_rx.vhd sub00/vhpl10 1257248674
AR sr4ce_mxilinx_spi_sri32 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sri32.vhf sub00/vhpl42 1257248706
EN uart_tx NULL E:/ProjFPGA/ct-BASIC-LCD/source/uart_tx.vhd sub00/vhpl31 1257248695
AR irq_latch behavioral E:/ProjFPGA/ct-BASIC-LCD/main/IRQ_latch.vhf sub00/vhpl66 1257248730
AR m2_1_mxilinx_spi_sro32 behavioral E:/ProjFPGA/ct-BASIC-LCD/main/SPI_sro32.vhf sub00/vhpl50 1257248714
EN spi_reg32 NULL E:/ProjFPGA/ct-BASIC-LCD/main/SPI_reg32.vhf sub00/vhpl57 1257248721
AR count_lrc behave E:/ProjFPGA/ct-BASIC-LCD/source/COUNT_LRC.vhd sub00/vhpl62 1257248726
EN mid_point NULL E:/ProjFPGA/ct-BASIC-LCD/source/bresenham.vhd sub00/vhpl21 1257248685