vhdtdtfi -lib work ../source/SPI_inout.vhd -prj ports -o SPI_inout.spl -module SPI_inout -template C:/Xilinx/13.1/ISE_DS/ISE//data/splfile.tft -deleteonerror 
spl2sym -intstyle ise -family spartan3a -w SPI_inout.spl E:/ProjFPGA/UNIC_3A/ports/main/SPI_inout.sym 
vhdtdtfi -lib work ../source/SPI_inout.vhd -prj ports -o SPI_inout.spl -module SPI_inout -template C:/Xilinx/13.1/ISE_DS/ISE//data/splfile.tft -deleteonerror 
spl2sym -intstyle ise -family spartan3a -w SPI_inout.spl E:/ProjFPGA/UNIC_3A/ports/main/SPI_inout.sym 
vhdtdtfi -lib work ../source/SPI_inout.vhd -prj ports -o SPI_inout.spl -module SPI_inout -template C:/Xilinx/13.1/ISE_DS/ISE//data/splfile.tft -deleteonerror 
spl2sym -intstyle ise -family spartan3a -w SPI_inout.spl E:/ProjFPGA/UNIC_3A/ports/main/SPI_inout.sym 
vhdtdtfi -lib work ../source/SPI_inout.vhd -prj ports -o SPI_inout.spl -module SPI_inout -template C:/Xilinx/13.1/ISE_DS/ISE//data/splfile.tft -deleteonerror 
spl2sym -intstyle ise -family spartan3a -w SPI_inout.spl E:/Dropbox/UNIC_3A/ports/main/SPI_inout.sym