<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">

  <!--                                                          -->

  <!--             For tool use only. Do not edit.              -->

  <!--                                                          -->

  <!-- ProjectNavigator created generated project file.         -->

  <!-- For use in tracking generated file and other information -->

  <!-- allowing preservation of process status.                 -->

  <!--                                                          -->

  <!-- Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved. -->

  <version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>

  <sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="pwm.xise"/>

  <files xmlns="http://www.xilinx.com/XMLSchema">
    <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="Counter_32_Bit.sym" xil_pn:origination="imported"/>
    <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="Frequency_Generator.sym" xil_pn:origination="imported"/>
    <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="SPI_in.sym" xil_pn:origination="imported"/>
    <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="SPI_inout.sym" xil_pn:origination="imported"/>
    <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="Timer.sym" xil_pn:origination="imported"/>
    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/bitgen.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/map.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/par.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/trce.xmsgs"/>
    <file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
    <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="ledpwm.sym" xil_pn:origination="imported"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="pwm.bgn" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BIT" xil_pn:name="pwm.bit" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="pwm.bld"/>
    <file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="pwm.cmd_log"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_DRC" xil_pn:name="pwm.drc" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:fileType="FILE_JHD" xil_pn:name="pwm.jhd"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="pwm.lso"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="pwm.ncd" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="pwm.ngc"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="pwm.ngd"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="pwm.ngr"/>
    <file xil_pn:fileType="FILE_PAD_MISC" xil_pn:name="pwm.pad"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAR_REPORT" xil_pn:name="pwm.par" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PCF" xil_pn:name="pwm.pcf" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="pwm.prj"/>
    <file xil_pn:fileType="FILE_TRCE_MISC" xil_pn:name="pwm.ptwx"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="pwm.stx"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="pwm.syr"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_TXT_REPORT" xil_pn:name="pwm.twr" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_XML_REPORT" xil_pn:name="pwm.twx" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_UNROUTES" xil_pn:name="pwm.unroutes" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="pwm.ut" xil_pn:subbranch="FPGAConfiguration"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VHDL" xil_pn:name="pwm.vhf"/>
    <file xil_pn:fileType="FILE_XPI" xil_pn:name="pwm.xpi"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="pwm.xst"/>
    <file xil_pn:fileType="FILE_VHDL" xil_pn:name="pwm_drc.vhf"/>
    <file xil_pn:fileType="FILE_HTML" xil_pn:name="pwm_envsettings.html"/>
    <file xil_pn:fileType="FILE_NCD" xil_pn:name="pwm_guide.ncd" xil_pn:origination="imported"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="pwm_map.map" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="pwm_map.mrp" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="pwm_map.ncd" xil_pn:subbranch="Map"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGM" xil_pn:name="pwm_map.ngm" xil_pn:subbranch="Map"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="pwm_map.xrpt"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="pwm_ngdbuild.xrpt"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="pwm_pad.csv" xil_pn:subbranch="Par"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_TXT_REPORT" xil_pn:name="pwm_pad.txt" xil_pn:subbranch="Par"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="pwm_par.xrpt"/>
    <file xil_pn:fileType="FILE_HTML" xil_pn:name="pwm_summary.html"/>
    <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="pwm_summary.xml"/>
    <file xil_pn:fileType="FILE_WEBTALK" xil_pn:name="pwm_usage.xml"/>
    <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="pwm_vhdl.prj"/>
    <file xil_pn:fileType="FILE_XRPT" xil_pn:name="pwm_xst.xrpt"/>
    <file xil_pn:fileType="FILE_HTML" xil_pn:name="usage_statistics_webtalk.html"/>
    <file xil_pn:fileType="FILE_LOG" xil_pn:name="webtalk.log"/>
    <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xlnx_auto_0_xdb"/>
    <file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
  </files>

  <transforms xmlns="http://www.xilinx.com/XMLSchema">
    <transform xil_pn:end_ts="1321022090" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1321022090">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1321028249" xil_pn:in_ck="9168552790039348992" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-7876472416039082686" xil_pn:start_ts="1321028249">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="pwm.vhf"/>
    </transform>
    <transform xil_pn:end_ts="1320940547" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="6987237338418569639" xil_pn:start_ts="1320940547">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1320940547" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1320940547">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1320940547" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-1833889514428375014" xil_pn:start_ts="1320940547">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1320940547" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="1430049303118697548" xil_pn:start_ts="1320940547">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1320940547" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="-5726930692106069135" xil_pn:start_ts="1320940547">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1321028265" xil_pn:in_ck="6411292023591579354" xil_pn:name="TRANEXT_xstsynthesize_spartan3e" xil_pn:prop_ck="6150692610653738075" xil_pn:start_ts="1321028249">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="WarningsGenerated"/>
      <status xil_pn:value="ReadyToRun"/>
      <status xil_pn:value="OutOfDateForOutputs"/>
      <status xil_pn:value="OutputChanged"/>
      <outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
      <outfile xil_pn:name="pwm.jhd"/>
      <outfile xil_pn:name="pwm.lso"/>
      <outfile xil_pn:name="pwm.ngc"/>
      <outfile xil_pn:name="pwm.ngr"/>
      <outfile xil_pn:name="pwm.prj"/>
      <outfile xil_pn:name="pwm.stx"/>
      <outfile xil_pn:name="pwm.syr"/>
      <outfile xil_pn:name="pwm.xst"/>
      <outfile xil_pn:name="pwm_vhdl.prj"/>
      <outfile xil_pn:name="pwm_xst.xrpt"/>
      <outfile xil_pn:name="webtalk_pn.xml"/>
      <outfile xil_pn:name="xst"/>
    </transform>
    <transform xil_pn:end_ts="1320940563" xil_pn:in_ck="7414336735594963889" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="3734212952607862" xil_pn:start_ts="1320940563">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
    <transform xil_pn:end_ts="1321028273" xil_pn:in_ck="3163949841442462123" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="2801960761139233587" xil_pn:start_ts="1321028265">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="_ngo"/>
      <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
      <outfile xil_pn:name="pwm.bld"/>
      <outfile xil_pn:name="pwm.ngd"/>
      <outfile xil_pn:name="pwm_ngdbuild.xrpt"/>
    </transform>
    <transform xil_pn:end_ts="1321028279" xil_pn:in_ck="8637953224529805196" xil_pn:name="TRANEXT_map_spartan3" xil_pn:prop_ck="7237482619569386477" xil_pn:start_ts="1321028273">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="WarningsGenerated"/>
      <status xil_pn:value="ReadyToRun"/>
      <status xil_pn:value="OutOfDateForOutputs"/>
      <status xil_pn:value="OutputChanged"/>
      <outfile xil_pn:name="_xmsgs/map.xmsgs"/>
      <outfile xil_pn:name="pwm.pcf"/>
      <outfile xil_pn:name="pwm_map.map"/>
      <outfile xil_pn:name="pwm_map.mrp"/>
      <outfile xil_pn:name="pwm_map.ncd"/>
      <outfile xil_pn:name="pwm_map.ngm"/>
      <outfile xil_pn:name="pwm_map.xrpt"/>
      <outfile xil_pn:name="pwm_summary.xml"/>
      <outfile xil_pn:name="pwm_usage.xml"/>
    </transform>
    <transform xil_pn:end_ts="1321028297" xil_pn:in_ck="8927208039732221701" xil_pn:name="TRANEXT_par_spartan3" xil_pn:prop_ck="-7315222464170770773" xil_pn:start_ts="1321028279">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="WarningsGenerated"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="_xmsgs/par.xmsgs"/>
      <outfile xil_pn:name="pwm.ncd"/>
      <outfile xil_pn:name="pwm.pad"/>
      <outfile xil_pn:name="pwm.par"/>
      <outfile xil_pn:name="pwm.ptwx"/>
      <outfile xil_pn:name="pwm.unroutes"/>
      <outfile xil_pn:name="pwm.xpi"/>
      <outfile xil_pn:name="pwm_pad.csv"/>
      <outfile xil_pn:name="pwm_pad.txt"/>
      <outfile xil_pn:name="pwm_par.xrpt"/>
    </transform>
    <transform xil_pn:end_ts="1321028308" xil_pn:in_ck="149432565943" xil_pn:name="TRANEXT_bitFile_spartan3a" xil_pn:prop_ck="-426368325978129584" xil_pn:start_ts="1321028297">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
      <outfile xil_pn:name="pwm.bgn"/>
      <outfile xil_pn:name="pwm.bit"/>
      <outfile xil_pn:name="pwm.drc"/>
      <outfile xil_pn:name="pwm.ut"/>
      <outfile xil_pn:name="usage_statistics_webtalk.html"/>
      <outfile xil_pn:name="webtalk.log"/>
      <outfile xil_pn:name="webtalk_pn.xml"/>
    </transform>
    <transform xil_pn:end_ts="1321028297" xil_pn:in_ck="5492525531673032584" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416186" xil_pn:start_ts="1321028293">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
      <outfile xil_pn:name="pwm.twr"/>
      <outfile xil_pn:name="pwm.twx"/>
    </transform>
  </transforms>

</generated_project>
