Design Integrity Status Report
------------------------------

Report File    : H:\ProjPCB\ADAC\FPGA-ISRAM_BGA\FPGA (PCB - Design Integrity Status Report).txt
Report Written : Sunday, August 15, 2010
Project Path   : H:\ProjPCB\ADAC\FPGA-ISRAM_BGA\FPGA.prj
Design Path    : H:\ProjPCB\ADAC\FPGA-ISRAM_BGA\FPGA.pcb
Design Title   : 
Created        : 14.12.2006 11:34:15
Last Saved     : 15.08.2010 13:11:46
Editing Time   : 35420 min
Units          : mm (precision 2)

Checking integrity of Schematic and Pcb designs in project "FPGA".


Warning: Net "A8" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A9" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A10" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A12" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A13" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A5" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A7" uses different net classes "Addr" and "Signal" on different pages.
Warning: Project has more than one version of Component "CP1" FPGA-MC.sch & FPGA-RTC.sch

	At least one should be reloaded otherwise results may be incorrect.
Warning: Net "A8" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A9" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A10" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A12" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A13" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A14" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A5" uses different net classes "Addr" and "Signal" on different pages.
Warning: Net "A7" uses different net classes "Addr" and "Signal" on different pages.


End Of Report.